1. Field of the Invention
The present invention relates to a circuit for selectively outputting high frequency signals and, more specifically, to a circuit for selectively outputting high frequency signals which selectively switches to and from high frequency signals from an antenna and high frequency signals from a RF modulator to output the same to a television receiver in a video cassette recorder (hereinafter referred to as VCR) containing a tuner.
2. Description of the Prior Art
FIG. 1 is block diagram showing a schematic structure of a conventional VCR containing a tuner such as shown in Japanese Utility Model Laying-Open Gazette No. 141637/1983. Referring to the figure, a television broadcasting signal (first high frequency signal) induced on an antenna 10 is inputted into a VCR 12 through an antenna input terminal A. A splitter 14 splits the first high frequency signal to output terminals B and C. The output terminal C is connected to an output terminal D for TV through a first transmission line l1. A first switch means 24 is provided on the first transmission line l1. The output terminal D for TV is connected to an antenna input terminal F of an external television receiver 100.
Meanwhile, the first high frequency signal applied to the output terminal B is applied to a tuner 16. The tuner 16 receives broadcasting signals of a desired channel from the first high frequency signal and applies video signals and audio signals of the channel to a recording/reproducing circuit 18. The recording/reproducing circuit 18 records the applied video signals and audio signals on a magnetic tape, or it reproduces and outputs the video signals and audio signals recorded on the magnetic tape. The video signals and audio signals reproduced by the recording/reproducing circuit 18 are applied to a RF modulator 22. The RF modulator 22 converts the applied reproduced signals into high frequency signals (second high frequency signals) of a predetermined channel (channel 3 or 4 in the United States and channel 1 or 2 in Japan). An output of the RF modulator 22 is applied to the output terminal D for TV through a second transmission line l2 and through second switch means 26. The first and second switch means 24 and 26 have their on.off controlled by a control voltage applied to a control terminal E. The control voltage is also applied to the RF modulator 22, whereby the RF modulator 22 has its on.off controlled by the control voltage.
In the above described structure, when a low level control voltage is applied to the control terminal E, both first and second switch means 24 and 26 turn off. Therefore, the second transmission line l2 is cut off by the second switch means 26. Therefore, the first high frequency signals are outputted from the output terminal D for TV. At this time, the RF modulator 22 is off, so that the second high frequency signals are not outputted.
Meanwhile, if a high level (+B) control voltage is applied to the control terminal E, both first and second switch means 24 and 26 turn on. In addition, the RF modulator 22 is turned on to output the second high frequency signals. Therefore, the second high frequency signals outputted from the RF modulator 22 are applied to the output terminal D for TV through the second transmission line l2 and the second switch means 26. On this occasion, the first transmission line l1 is grounded by the first switch means 24. Therefore, the first high frequency signals applied to the first transmission line l1 from the splitter 14 are attenuated by the first switch means 24 and not transmitted to the output terminal D for TV. Namely, the first switch means 24 substantially cuts off the first transmission line l1.
As described above, the VCR of FIG. 1 selectively switches to and from the first high frequency signals from the antenna and the second high frequency signals from the RF modulator to output the same to the television receiver 100.
Meanwhile, in the VCR such as shown in FIG. 1, the circuit processing high frequency signals is shielded in order to prevent leak of the high frequency signals.
FIG. 2 is a schematic diagram showing the shielded high frequency circuit unit. Referring to the figure, the high frequency circuit 30 (comprising a splitter 14, an RF modulator 22, first and second switch means 24 and 26 and first and second transmission lines l1 and l2) is contained in a shield box 31. The shield box 31 is provided with an antenna input terminal A, an output terminal B, an output terminal D for TV, a control terminal E and, reproduced signal input terminals G and H. The television broadcasting signals (first high frequency signals) of VHF.UHF band (54.about.about 900 MHz) are splitted by the splitter 14 to be applied to the output terminals B and C. The output terminal B is connected to a tuner 16 contained in the VCR. The output terminal C is connected to one end of the first transmission line l1. The other end of the first transmission line l1 is connected to the output terminal D for TV. Capacitors C6, C7 and C8 are interposed in series in the first transmission line l1. Coils L3 and L5 are interposed in parallel between the first transmission line l1 and the ground. These capacitors C6 to C8 and the coils L3 and L5 constitute a high pass filter 34 which passes high frequency signals having the frequency higher than 50 MHz (50.about.1000 MHz). Transistors Q1 and Q2 constituting the first switch means 24 are provided in association with the first transmission line l1. The transistor Q1 has its collector connected to a node h between the capacitors C7 and C8, and its emitter grounded. A control voltage is applied from the control terminal E to the base of the transistor Q1 through the signal line l3 and a bias resistance R6. The transistor Q2 has its base connected to a node between capacitors C6 and C7. The control voltage is applied from the control terminal E to the base of the transistor Q2 through the signal line l3 and a bias resistance R5. The transistor Q2 has its emitter connected to said node h through the coil L4. The collector of the transistor Q2 is grounded. The coil L4 cooperates with the capacitor C7 to form a parallel resonance circuit 36 when the transistor Q2 is on.
The RF modulator 22 (implemented in an IC) comprises a voltage terminal 22B, a video input terminal 22V, an audio input terminal 22S, a video output terminal 22V', an audio output terminal 22S' and a channel setting terminal 22F. The control voltage is applied from the control terminal E to the voltage terminal B through the signal line l4. Capacitors C9 and C10 for high frequency attenuation are connected in parallel between the signal line l4 and the ground. The reproduced video signals and reproduced audio signals are applied from the recording/reproducing circuit 18 of FIG. 1 through the reproduced signal input terminals G and H to the video input terminal 22V and to the audio input terminal 22S, respectively. The RF modulator 22 converts the applied reproduced video signals and reproduced audio signals to high frequency video signals and audio signals of channel 3 or channel 4 to output the same from the video output terminal 22V' and from the audio output terminal 22S'. Whether the signals should be converted into channel 3 high frequency signals or channel 4 high frequency signals is determined by switching the channel switch connected to the channel setting terminal 22F. The high frequency video signals outputted from the video output terminal 22V' are supplied to a node g through a resistance R1 for attenuation and through a capacitor C1 for cutting direct current. The high frequency audio signals outputted from the audio output terminal 22S' are supplied to the node g through a resistance R2 for attenuation and a capacitor C2 for cutting direct current. The amount of attenuation by the resistances R1 and R2 are appropriately selected in accordance with the specification of the finished product. A resistance R3 is interposed between the node g and the ground for setting the output impedance at 75 .OMEGA.. The node g is connected to the emitter of the transistor Q3 through the second transmission line l2. A low pass filter 32 constituted by coils L1 and L2 and capacitors C3 to C5 is interposed in the second transmission line l2. The low pass filter 32 has its high frequency signal passing characteristics set such that the second high frequency signals (60 to 70 MHz) of channel 3 or channel 4 outputted from the RF modulator 22 are passed therethrough. Therefore, the low pass filter 32 removes the higher order harmonic component of the second high frequency signals (the second order harmonic component is, for example, 120.about.150 MHz). The transistor Q3 is an NPN transistor constituting the second switch means 26. The transistor Q3 has its collector connected to the output terminal D for TV. The control voltage is applied from the control terminal E to the base of the transistor Q3 through the signal line l3 and the bias resistance R4.
The operation of the high frequency circuit unit shown in FIG. 2 will be described in the following.
First, description will be given of the operation when a low level control voltage is applied to the control terminal E. In this case, the RF modulator 22 do not operate, so that the second high frequency signals are not outputted. Transistors Q1 to Q3 are all off. Therefore, the coils L3 and L5 and the capacitors C6 to C8 constitute a high pass filter 34. As described above, the high pass filter 34 passes the high frequency signals of 50 to 1000 MHz, so that the entire band of the first high frequency signals of VHF.UHF band outputted from the splitter 14 are passed therethrough. Consequently, the first high frequency signals inputted to the antenna input terminal A are outputted to the output terminal D for TV through the high pass filter 34.
Next, description will be given of the operation when a high level control voltage is applied to the control terminal E. In this case, the RF modulator 22 operates to output the second high frequency signals. On this occasion, the transistor Q3 is on. Therefore, the second high frequency signals outputted from the RF modulator 22 are applied to the output terminal D for TV through the low pass filter 32 and the transistor Q3. Meanwhile, on this occasion, both transistors Q1 and Q2 are turned on. Therefore, the first transmission line l1 is grounded by the transistor Q1. Therefore, first high frequency signals outputted from the splitter 14 to the first transmission line l1 are brought to the ground through the transistor Q1 to be attenuated. However, in the high frequency signal band, the on characteristics (conductivity) of the transistor Q1 is not perfect. Therefore, the first high frequency signals from the splitter 14 are not sufficiently attenuated, and therefore, the signals may possibly be transmitted to the output terminal D for TV. On this occasion, however, the transistor Q2 is on and the coil L4 is connected in parallel to the capacitor C7 to form a parallel resonance circuit 36. The values of the capacitor C7 and the coil L4 are previously selected such that the resonance frequency of the parallel resonance circuit 36 will be the band (60 to 72 MHz) of the channel 3 or channel 4 high frequency signal. Therefore, the parallel resonance circuit 36 prevents the transmission of the high frequency signals of channel 3 or channel 4 band. Namely, the first high frequency signals which have not sufficiently been attenuated by the transistor Q1 are further attenuated by the parallel resonance circuit 36. In addition, since the base of the transistor Q2 is connected to a node of capacitors C6 and C7, the signals on the first transmission line l1 are grounded between the base and emitter of the transistor Q2, so that they are further attenuated. Therefore, the first high frequency signals are hardly transmitted to the output terminal D for TV. The parallel resonance circuit 36 also prevents the passage of the second high frequency signals from the RF modulator 22. More specifically, the parallel resonance circuit 36 has the following two functions.
(1) It prevents the channel 3 or channel 4 signal components (60.about.72 MHz) out of the first high frequency signals (50.about.900 MHz) inputted to the antenna input terminal A from leaking to the output terminal D for TV through the first transmission line l1, thereby preventing mixture of the same with the second high frequency signals from the RF modulator 22.
(2) It prevents leak of the second high frequency signals from the RF modulator 22 to the antenna input terminal A and to the output terminal B reversely through the first transmission line l1.
Meanwhile, the RF modulator 22 contains a high frequency carrier signal oscillation circuit for converting the reproduced signals into high frequency signals of 60 to 72 MHz. As is well known, the high frequency signals are apt to leak. Therefore, the carrier signals and the higher order harmonic components thereof are considerably leaking out to the voltage terminal 22B of the RF modulator 22. If such carrier signals and the like goes out of the shield box, they affect other circuits as unnecessary radiation. Therefore, capacitors C9 and C10 are provided in the signal line l4 to attenuate these carrier signals and the like. In addition, such carrier signals and the like are also attenuated by a distribution inductance L6 existing in the signal line l4. The signal line l4 is bent so as to positively increase the value of the inductance L6 in order to enhance the effect of attenuation by the distribution inductance L6.
The circuit similar to the circuit shown in FIG. 2 is disclosed in Japanese Utility Model Laying-Open Gazette No. 7134/1986.
As described above, in the circuit of FIG. 2, the higher order harmonic components (the second order harmonic 120.about.146 MHz, the third order harmonic 180.about.20 MHz and so on of the second high frequency signals outputted from the RF modulator 22 are removed by the low pass filter 32. However, the removal is not perfect. In addition, the parallel resonance circuit 36 do not prevent the passage of the higher order harmonic components. The higher order harmonic components are not sufficiently attenuated only by the grounding between the collector and emitter of the transistor Q1 and between the base and the collector of the transistor Q2. Therefore, in the circuit of FIG. 2, the higher order harmonic components leak to the antenna input terminal A and to the output terminal B.
In the circuit of FIG. 2, when the transistors Q1 and Q2 are off, namely, when the first high frequency signals from the antenna input terminal A are selected to be outputted from the output terminal D for TV, the collector-emitter capacitance of the transistor Q1 and the base-collector capacitance of the transistor Q2 are interposed between the first transmission line l1 and the ground. Therefore, the first high frequency signals transmitted on the first transmission line l1 are undesirably attenuated by these capacitances. Now, the base-collector capacitance of a transistor is approximately twice the collector-emitter capacitance. Namely, in the circuit of FIG. 2, the undesirable attenuation of the first high frequency signals by the first switch means 24 becomes especially large at the transistor Q2.
FIG. 3 is a schematic diagram showing another example of a conventional high frequency circuit unit shown in FIG. 11(a) of SANYO TECHNICAL REVIEW Vol. 15 No. 2 Aug. 1983 pp. 59-64.
In this circuit of FIG. 3, three transistors Q are used as the first switch means 24. These three transistors have their collectors connected to the first transmission line l1 and their emitters grounded. Control voltage is applied from the control terminal E to the base of each of the transistors. Therefore, in the circuit of FIG. 3, when the second high frequency signals from the RF modulator 22 are selected to be outputted to the output terminal D for TV, the first transmission line l1 is grounded by the three transistors Q. Therefore, the amount of attenuation of the high frequency signals, especially in the higher order harmonics band of the RF modulator passing through the first transmission line l1 can be increased compared with the conventional circuit shown in FIG. 2.
Therefore, in the conventional circuit shown in FIG. 3, the amount of attenuation at high frequency of the first high frequency signals passing through the first transmission line l1 can be increased when the second high frequency signals are selected, and the amount of attenuation in the higher order harmonics band of the high frequency signals passing reversely from the RF modulator 22 to the splitter 14 can be increased compared with the conventional circuit shown in FIG. 2. However, the circuit of FIG. 3 has another problem of higher cost, since the number of transistors constituting the first switch means 24 is increased compared with the circuit of FIG. 2.
In the circuit of FIG. 3, when three transistors Q are off, namely, when the first high frequency signals from the antenna input terminal A are outputted to the output terminal D for TV, the collector-emitter capacitances of the transistor Q are interposed between the first transmission line l1 and the ground. As for each transistor, a large capacitance such as in the case of the transistor Q2 in the circuit of FIG. 2 is not connected between the first transmission line l1 and the ground. However, the number of the transistors is increased compared with the circuit of FIG. 2, so that the undesirable attenuation of the first high frequency signals is not improved when viewed as a whole.
Meanwhile, when the second high frequency signals of channel 3 or channel 4 from the RF modulator 22 should be outputted to the output terminal D for TV, the transistor Q is naturally on in the circuit of FIG. 2. On this occasion, the second high frequency signals are leaking out to the base of the transistor Q3. Since the carrier components for video signals have higher level, the leakage of carrier component is especially large. The leaking carrier components flow into the base of the transistor Q1 through bias resistances R4 and R6. And the carrier components leak out to the antenna input terminal A and the output terminal B through the collector of the transistor Q1.fwdarw.capacitor C8.fwdarw.2 splitter 14.
In order to prevent such leak of carrier components, it is proposed to provide a capacitor C11 for grounding high frequency on the signal line l3 connected to the base of the transistor Q3 and to the base of the transistors Q1. However, the signal line l3 comprises distribution inductances L7, L8, L9 and the like. In the actual circuit, we can not determine how and where the distribution inductances L7, L8 and L9 are generated on the signal line. In addition, different products have different values of the distribution inductances L7, L8 and L9. Consequently, the portion where the capacitor C11 for grounding high frequency is connected to the signal l3 should be experimentally found by the repetition of actual connection of the capacitor C11 and the examination of the characteristics. However, the found position for connection is not always available to other products.
As described above, it is very difficult to provide a capacitor C11 for grounding high frequency removing the carrier components leaking out from the transistor Q3 to the transistor Q1 through the signal line L3.
Therefore, it is proposed that the control voltage of the transistor Q3 should be supplied through the signal line l4 instead of the signal line l3. By doing so, the carrier components leaked to the base of the transistor Q3 are attenuated by the capacitors C9 and C10 and by the distribution inductance L6, so that they do not affect the transistor Q1.
However, the higher order harmonic components and the like of the carrier frequency are leaking out from the carrier signal oscillation circuit in the RF modulator to the voltage terminal 22B of the RF modulator 22, as described above. Therefore, the leaked higher order harmonic components leak out to the output terminal D for TV through the signal line l4 and through the transistor Q3, which is disadvantageous.